The invention relates generally to power switch circuitry to soft start a load, i.e. prevent initial current surge to a capacitive load.
In some systems, a single DC power source is used for more than one subsystem. In a maintenance operation, it may be necessary to replace one of the subsystems without shutting off the power. If the new subsystem contains a capacitive load (such as in a DC to DC power converter) and no surge protection is provided, then an instantaneous current surge will result when the subsystem is first plugged in. Such a current surge is undesirable because it can cause noise in the ground plane of the other subsystem and temporarily dip the DC voltage. Undesirable current surges can also occur when DC power is applied to a capacitive load via a switch.
It was previously known to include various types of surge protection circuits. A simple surge protection circuit comprises an inductor in series with the DC voltage source. However, such an inductor is expensive and causes some steady state power dissipation. Alternately, a current limiting resistor can be connected in series with the output of the DC source. This causes the same steady state power dissipation.
U.S. Pat. No. 5,063,303 discloses another technique wherein a very low Rds MOSFET provides output current through its drain to source path from a 5 volt supply. This path is activated by a gate bias network which charges a capacitor from a 24 volt supply located on the bus.
U.S. Pat. No. 3,852,623 discloses a timing circuit for energizing an output line a predetermined time after energization of a start of input line. The timer charges a capacitor through an FET operating in a self-biased mode so that purportedly current flow is constant and voltage rise is linear with time. However, this circuit includes a series resistor at the output.
A general object of the present invention is to provide a power switch circuit which provides a linear rise in voltage and subsequent low output impedance during normal operation.